KellyFrog 7bfaf7dde0 [Enhancement] Disable data race check by default, opt-in via env var (#2851) ...

The VerifyParallelLoop data race check can report false positives on
shared buffer stores whose per-thread addresses cannot be proven
distinct (e.g. indices loaded from fragments). Disable it by default;
users can opt in via the TILELANG_ENABLE_DATA_RACE_CHECK environment
variable or by explicitly setting the tl.disable_data_race_check pass
config to False.

2026-08-03 16:55:27 +08:00

..

amd

[BugFix] Fix ROCm intrinsic resolution after language dialect refactor (#2779)

2026-07-27 17:58:18 +08:00

analysis

[Refactor][Pipeline] Run pipeline rewriting before layout inference and stabilize tiled WS (#2002)

2026-04-07 23:54:55 +08:00

arith

[TIR][IR] Update to use tirx (#2216)

2026-05-20 15:38:13 +08:00

autotune

[BugFix] Prevent autotuner cache reuse across different outputs and validation settings (#2793)

2026-07-29 14:08:14 +08:00

cache

[CUDA][Cache] Include compile options in binary cache key (#2532)

2026-07-07 00:09:22 +08:00

carver

[BugFix] Fix IntrinInfo repr (#2175)

2026-05-22 16:16:50 +08:00

components

[Feature] Add compiler pass timing profiling (#2622)

2026-07-16 21:36:07 +08:00

contrib

[BugFix] Isolate cross-compiler options per invocation (#2728)

2026-07-22 19:00:59 +08:00

cpu

[BugFix] Make T.transpose swap only the final two axes (#2757)

2026-07-24 13:29:24 +08:00

cuda

[CUDA] Extend the GEMM FMA fallback to SM75 (#2811)

2026-07-30 13:05:55 +08:00

debug

[Feature] Add lower-trace support for debugging & rebased (#2725)

2026-07-22 16:27:01 +08:00

fastmath

[TIR][IR] Update to use tirx (#2216)

2026-05-20 15:38:13 +08:00

issue

[BugFix] Reject uncovered warp partitions in T.gemm instead of producing silently wrong results (#2724)

2026-07-30 13:53:03 +08:00

jit

[BugFix] Marshal NVRTC scalar parameters and dynamic strides (#2756)

2026-07-27 15:39:15 +08:00

kernel

[CUDA] Extend the GEMM FMA fallback to SM75 (#2811)

2026-07-30 13:05:55 +08:00

language

[CUDA] Pack logical TMEM buffers into shared tcgen05.alloc arenas (#2831)

2026-08-03 13:53:12 +08:00

layout

[Refactor] Remove intrinsic compatibility facade (#2812)

2026-07-30 14:26:21 +08:00

llvm

[BugFix] Fix llvm auto backend resolution (#2519)

2026-07-06 10:55:13 +08:00

math

[BugFix] Add pre-SM80 fallback for bf16 __hfma (#2769)

2026-07-25 19:57:47 +08:00

metal

[Metal] M5 Cooperative Tensor T.gemm (#2252)

2026-07-28 16:17:15 +08:00

profiler

[tilelang] Fix CUPTI cache flush filtering (#2244)

2026-05-22 16:15:53 +08:00

quantize

[CUDA] Add SM120 NVF4 block-scale MMA support (#2364)

2026-07-30 18:10:10 +08:00

runtime

[TIR][IR] Update to use tirx (#2216)

2026-05-20 15:38:13 +08:00

target

[JIT] Remove legacy DLPack execution backend (#2816)

2026-07-30 19:46:49 +08:00

tilelibrary

[Refactor] Move example-only helpers out of tilelang package (#2761)

2026-07-24 18:03:34 +08:00

tools

[Feature] Support iket profiler for CUDA backend (#2515)

2026-07-12 20:03:30 +08:00

transform

[Enhancement] Disable data race check by default, opt-in via env var (#2851)

2026-08-03 16:55:27 +08:00

utils

[Refactor] Move example-only helpers out of tilelang package (#2761)

2026-07-24 18:03:34 +08:00

webgpu

[Enhancement] Update examples and tests for improved type handling functionality (#1448)

2025-12-17 14:41:25 +08:00

test_version_provider.py

[Build] Fix sdist version metadata (#2374)

2026-06-11 20:40:16 +08:00