Commit Graph
622 Commits
Author SHA1 Message Date
morluto bc9515febd [BugFix] Prevent autotuner cache reuse across different outputs and validation settings (#2793)
* [BugFix] Include behavioral args in autotune cache keys

* [BugFix] Bypass autotune cache for profile callbacks
2026-07-29 14:08:14 +08:00
morluto 2c84f4f931 [BugFix] Check shared-TMEM buffer pointer types before dereference (#2794)
[BugFix] Validate shared-tmem buffer pointer types
2026-07-29 13:53:59 +08:00
cjandcaojian5 51f88a88ed [BugFix] Reject floating-point predicates in vote intrinsics (#2800)
* Reject floating-point predicates in vote intrinsics

* Accept boolean vote predicates

---------

Co-authored-by: caojian5 <caojian5@huawei.com>
2026-07-29 13:33:48 +08:00
cjandcaojian5 b1b605dab4 [BugFix] Preserve alloc_var initializer dtype (#2801)
* Preserve alloc_var initializer dtype

* Test alloc_var float32 initializer range

---------

Co-authored-by: caojian5 <caojian5@huawei.com>
2026-07-29 13:32:45 +08:00
Yongqi Zhuo 1cb4d4f3ac [CUDA] Support arbitrary TMEM layouts (#2785)
* [CUDA] Support arbitrary TMEM layouts

* Fix bugs
2026-07-29 13:07:28 +08:00
Liu YunuoandSiriusNEO 7ec5adbeb1 [BugFix] Pass buffer row stride to 2D scan kernel to fix silent miscomputation (#2620)
* fix: pass buffer row stride to 2D scan kernel to fix silent miscomputation

* update test

* lint

* fix: pass separate src and dst row strides to 2D scan kernel

* test: cover scans with distinct source and destination strides

---------

Co-authored-by: SiriusNEO <chaofan@deepseek.com>
2026-07-28 17:21:48 +08:00
Lei Wang 6171343c06 [TIR][Language] Add typed vector lane extraction API (#2789)
* [TIR][Python] Add vector lane extraction API

* [TIR][Python] Move Shuffle export to TIR facade

* [TIR][Python] Forward Shuffle through op facade
2026-07-28 17:18:25 +08:00
Yichen YanandSiriusNEO 1545f0065d [Metal] M5 Cooperative Tensor T.gemm (#2252)
* [Metal] Add cooperative tensor intrinsics

Expose TileLang-owned cooperative tensor builtins so Metal MPP lowering does not depend on extra TVM fork APIs.

* [Metal] Select cooperative tensor GEMM lowering

Add a shape-aware MPP instruction choice for shared-output Metal GEMM while preserving simdgroup fallback for fragments and unsupported tiles.

* [Metal] Emit MPP cooperative tensor shaders

Generate Metal 4 MPP matmul2d code for cooperative tensor intrinsics and keep source-only codegen separate from runtime compilation.

* [Metal] Lower GEMM through MPP tensor ops

Split Metal GEMM lowering into simdgroup and cooperative tensor emitters so M5 tiles use MPP while fragment accumulators keep the existing path.

* [Metal] Guard generic passes for cooperative tensors

Keep generic allocation and storage rewrites away from opaque Metal cooperative tensor scopes to avoid invalid scope analysis.

* [Metal] Test cooperative tensor GEMM coverage

Add runtime and source-only coverage for non-square MPP GEMM so the new cooperative tensor path is reproducible in CI and on M5.

* [Metal] Update TVM Metal 4 runtime guard

Point the submodule at the macOS SDK guarded Metal 4 runtime update used by cooperative tensor shaders.

* [Metal] Document cooperative tensor GEMM

Add a reference page covering the two Metal GEMM paths, selection rules, current limitations, and planned follow-up work.

* lint

* Improve Metal cooperative tensor GEMM

* Optimize Metal cooperative tensor GEMM

* Update TVM Metal 4 support

* Add Metal backend internals documentation

* Harden Metal cooperative tensor lowering

* test older impl with new framework

* Clean up Metal transform exports

* Use macos-latest for Metal CI

* resolve comments and lint

---------

Co-authored-by: SiriusNEO <chaofan@deepseek.com>
2026-07-28 16:17:15 +08:00
BoHao Chen 940b106108 [BugFix] Honor nan_propagate in reduce max/min/absmax clear=False write-back (#2788)
* [BugFix] Honor nan_propagate in reduce max/min/absmax clear=False write-back

MakeUpdate (the clear=False write-back merge) used plain Max/Min for
max/min/absmax reducers, silently dropping NaN when nan_propagate=True.
Now it emits max_nan/min_nan on fp16/bf16 when nan_propagate is set,
mirroring the existing MakeReduce path.

GHI: #2697

* [BugFix] Honor nan_propagate in reduce max/min/absmax clear=False write-back

MakeUpdate (the clear=False write-back merge) used plain Max/Min for
max/min/absmax reducers, silently dropping NaN when nan_propagate=True.
Now it emits max_nan/min_nan on fp16/bf16 when nan_propagate is set,
mirroring the existing MakeReduce path.

GHI: #2697
2026-07-28 16:04:07 +08:00
penguin_wwyandLeiWang1999 a42bbc3cb5 [TIR] Inject source spans into tirx IR and surface source locations in compiler errors (#2751)
* Add span

* Fix span

* Fix

* Fix

* Fix

* Fix

* Fix

* Improve source span propagation and diagnostics

---------

Co-authored-by: LeiWang1999 <leiwang1999@outlook.com>
2026-07-28 13:46:14 +08:00
Lei Wang 500c3686a5 [CUDA][Transform] Fix PCWS index dtype handling (#2783)
Fix PCWS index dtype handling
2026-07-28 12:28:08 +08:00
penguin_wwy eb31994ad7 [BugFix] Preserve loop step when unrolling loops (#2784) 2026-07-28 11:21:55 +08:00
wcxandSiriusNEO 51fbfc7ee6 [BugFix] Fallback non-16B cluster bulk copies (#2683)
* [BugFix] Fallback non-16B cluster bulk copies

* test: tolerate typed cluster copy size diagnostics

---------

Co-authored-by: SiriusNEO <chaofan@deepseek.com>
2026-07-27 23:39:50 +08:00
Tong WU b5e3eb93ef [Enhancement] More compile-time guards for architecture-specific CUDA intrinsics (#2781)
fix: guard architecture-specific CUDA intrinsics
2026-07-27 21:11:59 +08:00
cklxx 2a17fffd44 [TileOP] Add SM70 GEMM FMA fallback (#2339)
* [TileOP] Add SM70 GEMM FMA fallback

* [TileOP] GemmFMA: drop redundant pre-staging sync and add docstrings

Address PR #2279 review:
- coderabbitai nit: the T.sync_threads() before the cooperative A/B stage
  loads is unnecessary because A_stage / B_stage are freshly allocated
  shared buffers — no other thread holds references to them, and the
  later sync before the GEMM compute is sufficient.
- Docstring Coverage pre-merge check: add module-, helper-, method-, and
  prim_func-level docstrings so coverage clears the 80% threshold.

No behavior change; the prim_func still stages through shared memory and
accumulates via scalar FMA. SM70 pytest trio still expected to pass.

* [TileOP] Harden SM70 GemmFMA fallback

* [TileOP] Fix SM70 FMA staging dtypes

* [TileOP] Tighten SM70 MMA dispatch for transposed A
2026-07-27 20:30:42 +08:00
jpwang aa7df8670e [BugFix] Fix fp16/bf16 T.atomic_max/atomic_min silently corrupting fp32 values (#2780)
* [BugFix] Convert value to dst dtype in fp16/bf16 atomic max/min

* Make the linter happy
2026-07-27 20:28:20 +08:00
Chaofan Lin 9fb7572886 [BugFix] Fix ROCm intrinsic resolution after language dialect refactor (#2779)
* Fix ROCm intrinsic resolution after dialect refactor

* Use concise language aliases in dialect tests
2026-07-27 17:58:18 +08:00
Chennes 92072ab271 [BugFix] Cast to the destination dtype in the scalar T.copy path (#2771)
* [BugFix] Cast to the destination dtype in the scalar T.copy path

The scalar fast path in T.copy lowers a single-element copy directly to a
BufferStore. Unlike the general region path, which casts the loaded value to
the destination dtype in src/op/copy.cc, it stored the source value unchanged.
A cross-dtype scalar copy therefore failed the strict BufferStore dtype check.

This affects the common gather pattern of copying an int64 index tensor
(torch's default for argsort and topk) into an int32 on-device scratch buffer.

Mirror the general path by casting the source value to the destination
BufferLoad dtype when they differ, preserving any index lanes.

Add regression coverage for int64-to-int32 narrowing and int16-to-int32
widening.

Fixes #2689

* [BugFix] Convert the test index dtype with as_torch()

The TileLang dtype subclasses str, so getattr(torch, index_dtype) works, but
as_torch() states the conversion directly instead of relying on that detail.
2026-07-27 17:41:45 +08:00
Yuanyuan Zhaoandzyy3077 a69708c1d5 [BugFix] Reject non-power-of-two AllReduce widths (#2611)
Co-authored-by: zyy3077 <zyy3077@users.noreply.github.com>
2026-07-27 16:20:01 +08:00
Lei Wang 30aac1acdd [CUDA][Reduce] Fix packed AllReduce workspace pointer (#2778)
Update the TVM submodule for vector-typed access pointer lowering and keep generated reduction workspace accesses read-write. Add an SM100 regression for packed float32 reductions across warps.
2026-07-27 15:57:45 +08:00
morluto eceb0e6672 [BugFix] Marshal NVRTC scalar parameters and dynamic strides (#2756)
* [BugFix] Marshal NVRTC scalar and stride parameters

* [Test] Skip NVRTC host tests without cuda-python

* [BugFix] Resolve NVRTC symbols from live parameters

* [Test] Pin NVRTC host test streams
2026-07-27 15:39:15 +08:00
5ef1500ed2 [BugFix] Handle strided global buffers correctly in 1D TMA copies (#2746)
* Honor explicit strides in 1D TMA offsets

* Reject non-contiguous strided regions for 1D TMA

---------

Co-authored-by: Zheng Yu <17133261+cla7aye15I4nd@users.noreply.github.com>
Co-authored-by: SiriusNEO <chaofan@deepseek.com>
2026-07-27 15:38:52 +08:00
morluto 9609d3a53f [BugFix] Preserve explicit loop steps when transforms rebuild For nodes (#2752)
fix(transform): preserve explicit loop steps
2026-07-27 13:37:36 +08:00
Chennes c6294f07e3 [BugFix] Add pre-SM80 fallback for bf16 __hfma (#2769)
common.h defines a bfloat16_t __hfma wrapper that forwards to the
__nv_bfloat16 __hfma overload. CUDA only declares that overload for
__CUDA_ARCH__ >= 800, so on SM75 merely parsing the wrapper fails with
"no instance of overloaded function __hfma". Because common.h is included
by every generated kernel, this breaks all SM75 builds, not only bf16 ones.

Guard the native path on SM80+ and use an fp32 FMA followed by bf16
conversion on earlier architectures, following the existing pre-SM80 bf16
fallback strategy.

Add a compile-only regression test that builds a bf16 ieee_fmaf kernel for
an explicit SM75 target. Existing IEEE math tests use target="cuda", so an
SM80+ runner exercises only the native branch.
2026-07-25 19:57:47 +08:00
Chaofan Lin 8bb3300d60 [BugFix] Preserve if condition evaluation during fan-out (#2764)
* [BugFix] Preserve if condition evaluation during fan-out

* [BugFix] Avoid snapshotting replayable if conditions
2026-07-25 14:30:13 +08:00
Chaofan Lin e9240d6816 [Refactor] Move example-only helpers out of tilelang package (#2761) 2026-07-24 18:03:34 +08:00
Zheng YuandZheng Yu 1591d368db [BugFix] Preserve re-evaluation of mutable if conditions (#2744)
Avoid merging ifs with mutable conditions

Co-authored-by: Zheng Yu <17133261+cla7aye15I4nd@users.noreply.github.com>
2026-07-24 17:09:08 +08:00
Lei WangandSiriusNEO f862dc38a8 [Language][Backend] Language dialect for multi-backends (#2734)
* Add language dialect overlays

* Refactor language dialects into static backend layers

* Make language facade a static re-export and extract sparse layout leaf

Replace the runtime-activated language facade with a static
`from tilelang.cuda.language import *` re-export: drop the .pyi stubs +
generator + py.typed, the globals()-based __all__ scraping, and the
_activate_cuda_facade() setattr. Backend dialects (cuda/metal/rocm) now
build on tilelang.language.common with per-backend tir overlays.

Import-time dtype defaults in the mma/wgmma/mfma macro generators are
pinned to the dtypes leaf so they no longer touch the half-initialized
facade during bootstrap. Metal generators import tilelang.metal.language
(not the cuda facade) so the eager builder's real getattr resolves the
simdgroup ops; a lazy __getattr__ breaks the metal.language <-> intrinsics
cycle.

Extract the 2:4 sparsity layout metadata into
tilelang/cuda/intrinsics/sparse_layout.py (a dtypes-only leaf) so mma_sp
imports it directly and tilelang.utils.sparse drops out of the bootstrap
closure, letting its @tilelang.jit compressor go back to a module-level
decorator.

Exports unchanged: common=558, cuda/facade=683.

* Remove unwired BackendModule scaffolding

The BackendModule manifest and per-backend backend.py registrations were
included by mistake: nothing imports the per-backend backend.py files, the
ensure_*_loaded lazy-loaders have no call sites, and the mechanism
duplicates the register_lazy_execution_backends wiring already in
tilelang/backend/__init__.py. Drop the dead code and its unit test.

* Import tvm.arith in metal macro generator

The simdgroup stride check uses arith.Analyzer but the module was missing
the tvm.arith import.

* Use string dtype defaults in CUDA macro generators

Default dtype arguments are evaluated at import time, when the language
facade is only partially initialized, so they cannot reference T.*. They
previously used the tilelang.language.dtypes leaf; since every consumer
treats these as strings (annotated str, wrapped via DataType before use),
plain string literals are equivalent and drop the _dtypes dependency.

* Drop MPSIntrinEmitter from metal language facade

The emitter is only consumed directly from tilelang.metal.intrinsics, never
via the language surface, and exposing it here required a lazy __getattr__ to
break the metal.language <-> metal.intrinsics import cycle. Removing it from
__all__ eliminates the cycle and the deferred import.

* Restore dtype forwarding for ptx_ldmatrix

T.ptx_ldmatrix previously accepted a dtype= keyword via _dtype_forward (from
the old language/ast/ir.py path). The CUDA dialect alias dropped the wrapper
while every neighboring ptx_* operator kept it, changing the public call
contract. Wrap it to match.

* Re-export tir Select/min/max wrappers and dedup metal __all__

Add Select/min/max to tilelang.language.tir.ir __all__ so the common
facade re-exports the documented wrappers instead of the raw TVM
symbols. Build metal __all__ via dict.fromkeys to match the sibling
dialects and satisfy PLE0604.

---------

Co-authored-by: SiriusNEO <chaofan@deepseek.com>
2026-07-24 16:52:56 +08:00
morlutoandLeiWang1999 ab1d2df419 [BugFix] Support BufferRegion destinations in atomic_addx2 return_prev (#2753)
* fix(atomic): support sliced x2 return destinations

* fix(atomic): derive vector return dtype structurally

---------

Co-authored-by: LeiWang1999 <leiwang1999@outlook.com>
2026-07-24 14:45:21 +08:00
morlutoandLeiWang1999 2b4dd80325 [BugFix] Make T.transpose swap only the final two axes (#2757)
* [BugFix] Transpose only the final two axes

* [Test] Cover transpose boundary predicate mapping

* [BugFix] Guard transpose bounds with generated indices

---------

Co-authored-by: LeiWang1999 <leiwang1999@outlook.com>
2026-07-24 13:29:24 +08:00
Zheng YuandZheng Yu 235077cb58 [BugFix] Preserve loop steps during unswitching (#2741)
Preserve loop steps during unswitching

Co-authored-by: Zheng Yu <17133261+cla7aye15I4nd@users.noreply.github.com>
2026-07-23 14:41:19 +08:00
Zheng YuandZheng Yu 390d208db3 [BugFix] Use callee global symbols for cross-target calls (#2740)
Use callee symbols for cross-target calls

Co-authored-by: Zheng Yu <17133261+cla7aye15I4nd@users.noreply.github.com>
2026-07-23 14:25:27 +08:00
xiaoyouPREG 192ddea60f [BugFix] Gate TMEM and TMA builtins by CUDA architecture (#2743) 2026-07-23 14:22:05 +08:00
Zheng YuandZheng Yu 0c88682f6f [BugFix] Emit Metal barriers for dynamic shared memory (#2738)
Emit Metal barriers for dynamic shared memory

Co-authored-by: Zheng Yu <17133261+cla7aye15I4nd@users.noreply.github.com>
2026-07-23 12:39:57 +08:00
Xiangwen Wang bff1b9a325 [Feature] Support stochastic FP32 to FP16/BF16 casts (#2735)
Support stochastic FP32 to FP16/BF16 casts
2026-07-23 11:45:20 +08:00
ChennesandLeiWang1999 a443dde926 [BugFix] Reject contracting shared-buffer layouts in T.annotate_layout (#2719)
* [BugFix] Reject contracting shared-buffer layouts in T.annotate_layout

T.annotate_layout could accept a contracting many-to-one forward map on a
shared buffer. makeBufferWithLayout then misread the smaller output extent as
a replication factor, rewrote the buffer to a higher rank, and eventually
failed with an unrelated BufferStore dimensionality ICHECK.

Add a pigeonhole check for static layout shapes before the replication branch.
When the layout output extent is smaller than its input extent, raise a
user-facing ValueError that identifies the buffer and reports both extents.
Keep identity, permutation, and output-growing layouts unchanged.

This check intentionally targets contracting maps; general injectivity
analysis for maps with larger output bounding boxes is outside this change.

Fixes #2632

* [Layout] Enforce injective shared-buffer annotations

Add a LayoutNode injectivity check with an exact fallback for static domains, and reuse it for FragmentNode thread and replication coordinates. Validate shared-buffer annotations after layout reshaping so sparse many-to-one maps are rejected with a useful collision diagnostic while padded injective maps remain valid.

---------

Co-authored-by: LeiWang1999 <leiwang1999@outlook.com>
2026-07-23 11:21:48 +08:00
Lei Wang dff136d4da [CUDA][Pipeline] Fix 1D TMA selection for versioned layouts (#2737)
Fix pipelined 1D TMA layout detection
2026-07-22 21:38:18 +08:00
Zheng YuandZheng Yu 512d51f518 [BugFix] Honor explicit row strides in Metal GEMM (#2730)
Honor explicit Metal GEMM row strides

Co-authored-by: Zheng Yu <17133261+cla7aye15I4nd@users.noreply.github.com>
2026-07-22 19:01:33 +08:00
322a9cbb6e [BugFix] Isolate cross-compiler options per invocation (#2728)
* Keep cross-compiler options isolated per build

* Document cross-compiler option isolation

---------

Co-authored-by: Zheng Yu <17133261+cla7aye15I4nd@users.noreply.github.com>
Co-authored-by: SiriusNEO <chaofan@deepseek.com>
2026-07-22 19:00:59 +08:00
24a023c636 [BugFix][Transform] Never classify side-effecting binds as replayable (atomics re-executed at every use site since v0.1.11) (#2651)
* [Transform] Never classify side-effecting binds as replayable

IsReplayableScalarBind (introduced in #2245) decides whether a scalar
bind may be dissolved and its value re-evaluated at every use site
(IfStmtBinding, default-on) or replayed across pipeline stages
(PipelinePlanning, InjectSoftwarePipeline). The predicate checked the
dtype and read/write disjointness, but never the value's effect kind,
so a bind like

    pos = T.atomic_add(counter[0], 1, return_prev=True)

used at two sites (bound check + store index) was inlined into both use
sites, executing the atomic once per use site instead of exactly once
and silently corrupting compaction/histogram/top-k kernels since
v0.1.11. The atomic intrinsic is correctly registered kOpaque; its
pointer argument enters the expression through tvm_access_ptr, which
the access collector records as a read, so the write-disjointness check
passed and the bind was declared replayable.

Reject any bind whose value has SideEffect > kReadState, mirroring the
effect guard StmtSimplifier already applies to let inlining. Read-only
values remain replayable; read consistency is enforced by the existing
write-set disjointness check.

The shipped examples/deepseek_v32/topk_selector.py uses exactly this
pattern and is miscompiled on v0.1.11/v0.1.12; its test only printed
recall and could not fail, so it also gains a recall assertion.

Regression tests:
- transform: IfStmtBinding must keep a bind whose value is an atomic
  RMW returning the previous value.
- language (CUDA): compaction kernel using atomic_add(return_prev=True)
  must contain exactly one AtomicAddRet and produce a permutation with
  counter == N.

* [Transform] Validate scalar bind replay safety

Track access-pointer write masks during bind and pipeline analysis, and reject unsafe precomputed replay annotations during pipeline injection.

Add regressions for atomic target reads and side-effecting replay masks.

* Remove recall calculation from top-k selector

Removed recall calculation and assertion for top-k selection.

---------

Co-authored-by: LeiWang1999 <leiwang1999@outlook.com>
Co-authored-by: Lei Wang <34334180+LeiWang1999@users.noreply.github.com>
2026-07-22 17:43:01 +08:00
Lei Wang 052e6741c7 [TIR][Analyzer] Fix vectorized Select constraint handling (#2731)
[TIR] Handle broadcast Select conditions safely
2026-07-22 17:12:20 +08:00
sijieli2 9d819c3fc3 [BugFix] Fix MFMA DataType args causing compilation failure on ROCm (#2726)
Fix MFMA dtype args passed as DataType instead of str

When local_size is 1, compute_a_dtype/compute_b_dtype/compute_out_dtype
are assigned directly from self.a_dtype etc., which are tvm_ffi DataType
objects (a str subclass). The TVM FFI C++ layer dispatches DataType before
str in its type conversion, so these never get auto-converted to StringImm
(a PrimExpr). This causes MFMA GEMM compilation to fail on ROCm with:

  TypeError: Expected Array<ir.PrimExpr> but got Array[index 3: DataType]

The bug only triggers when local_size == 1 (e.g. float32 GEMM), because
when local_size > 1 the f-string produces a plain str.

Fix: convert dtype attrs to str() before building compute dtype strings.

Add test: testing/python/amd/test_mfma_dtype_str_bug.py
2026-07-22 16:28:11 +08:00
cc106fa2ad [Feature] Add lower-trace support for debugging & rebased (#2725)
* [feat] add lower-trace support for debugging

* [fix] address review: rebase, doc migration, lower_trace robustness

Address CodeRabbit + SiriusNEO review feedback on #2470:

Blocking (SiriusNEO):
- Rebase onto tile-ai/main (resolve docs/ + tilelang/__init__.py conflicts).
- Move IR Lower Trace doc from docs/tutorials/ to docs/tools/lower_trace.md
  (alongside pass_diff.md); add index entry and 'superseded' pointer on
  pass_diff.md; cross-link from the tutorial.

CodeRabbit Major:
- lower_trace/__init__.py: finally block uses active_exc pattern so a
  generate_html() failure can no longer mask the real lowering exception.
- lower_trace/html.py: sanitize rec.phase into DOM-safe IDs via _safe_id()
  before embedding in id="..." / selectors (avoids markup/JS breakage and
  local HTML injection from special characters).

CodeRabbit Minor:
- test_lower_trace.py: restore caller's TL_LOWER_TRACE* env after the guarded
  tilelang import instead of permanently clearing it.
- lower_trace/__init__.py: terminal mode prints a FAILED stanza (pass name,
  exception, pre-pass IR) before re-raising so the failing step is visible.
- lower_trace/core.py: _get_codegen_output_path() no longer auto-writes
  codegen.cpp in terminal-only mode (explicit override still honored).
- lower_trace/html.py: expandAll()/collapseCtx() null-guard the table lookup
  so a changed diff with no table fails safe.

Cleanup:
- Add docstrings to test helpers and tools.__getattr__ (coverage now 94%+).
- ruff check + format clean.

* [Docs] Add lower trace to tools sidebar

* [fix] route lower-trace env vars through tilelang.env

Register TL_LOWER_TRACE / TL_LOWER_TRACE_DIR as EnvVar in the central
Environment class with get_lower_trace_mode()/get_lower_trace_dir()
parsers, mirroring the existing TILELANG_PASS_DIFF convention, instead
of reading os.environ directly in the lower_trace module.

* [fix] simplify lower_trace lazy-import in tools __getattr__

Drop the redundant globals() cache assignment (import_module already
binds the submodule onto the parent package) and fix the docstring: the
module is imported lazily for cost, not to defer monkey-patch side
effects, which happen in enable(). Note why importlib is required over
"from . import" (the latter re-enters __getattr__ and recurses).

---------

Co-authored-by: caojian5 <caojian5@huawei.com>
Co-authored-by: SiriusNEO <chaofan@deepseek.com>
2026-07-22 16:27:01 +08:00
Zheng YuandZheng Yu bd5ca2f05a [BugFix] Preserve buffer element offsets in access pointers (#2727)
Preserve buffer offsets in access pointers

Co-authored-by: Zheng Yu <17133261+cla7aye15I4nd@users.noreply.github.com>
2026-07-22 15:42:39 +08:00
Liu Yunuo f8d8cd4b14 [BugFix] Use blockDim as workspace stride in batch AllReduce (#2621)
* fix: use blockDim as workspace stride in batch AllReduce

* add test
2026-07-21 18:46:14 +08:00
lianjinfeng2003 ac576c6356 [BugFix] Fix FP4 dequant symbolic exponent clamp (#2656)
* [BugFix] Fix FP4 dequant symbolic exponent clamp

* [BugFix] Align quantization regression
2026-07-21 18:23:49 +08:00
penguin_wwy 25c0a1556c [Transform] Replace CPU fallback thread placeholder with a constant-zero logical thread index (#2718)
* [BugFix] fix issue 2226

* Fix
2026-07-21 18:23:19 +08:00
Zheng YuandZheng Yu 8cfc90e026 [BugFix] Fix HIP predicated dword copy zero fill (#2721)
Fix HIP predicated dword copy zero fill

Co-authored-by: Zheng Yu <17133261+cla7aye15I4nd@users.noreply.github.com>
2026-07-21 17:52:19 +08:00
LyscoriaandSiriusNEO 88e007d4d7 [BugFix] Guard T.atomic_addx4 return type for sliced destinations (#2590)
[BugFix] Guard T.atomic_addx4 return type computation for sliced destinations

Co-authored-by: SiriusNEO <chaofan@deepseek.com>
2026-07-21 17:48:36 +08:00
Ruinan Li 656c287aff [BugFix] Fix wrong offset when scanning a non-zero-offset buffer sub-region (#2680)
fix: resolve issue 2536
2026-07-21 17:14:55 +08:00