Commit Graph
4 Commits
Author SHA1 Message Date
andyluo7 dd9c20dbf7 [Testing] Gate CUDA-only tests so non-CUDA backends can run the suite (#2863)
A large number of tests import CUDA-only internals directly (for example
`tilelang.cuda.pipeline.CUDAPassPipelineBodyPrologue`) or exercise
NVIDIA-specific features such as TMA, LDGSTG, mbarrier, warp specialization,
tcgen05 and tfloat32. `src/cuda/CMakeLists.txt` only compiles a small
"ALWAYS" subset when `USE_CUDA=OFF`, so those FFI symbols are never
registered and the tests fail with:

    AttributeError: module 'tilelang.cuda._ffi_api' has no attribute
                    'AnnotateDeviceBoundTmaCopies'

This is not ROCm-specific -- the same tests fail on any build without the
CUDA backend, including Metal and CPU-only.

Add `@tilelang.testing.requires_cuda` to those tests, plus three
portability fixes that keep coverage on non-CUDA backends instead of
skipping it:

* `test_tilelang_transform_layout_inference.py`: CUDA emits
  `__launch_bounds__(N, 1)` while HIP emits `__launch_bounds__(N)`.
  Match both.
* `test_tilelang_transform_pipeline_planning.py`: PipelinePlanning
  deliberately strips pipeline annotations on ROCm targets other than
  gfx950 (see the guard in src/transform/pipeline_planning.cc), so assert
  the documented sequential fallback there.
* `test_tilelang_kernel_gemm.py`: the two f32f32f32 cases use `T.tfloat32`,
  which is NVIDIA-only, so narrow `requires_cuda_or_cdna` to
  `requires_cuda`.

Also refresh three stale RDNA tests: gfx12 is now a supported generation
(`get_arch` accepts 11 and 12), so they can no longer assert that gfx1200
is rejected. Force an unsupported generation instead, which is the only
way to reach the guard now that `target_is_rdna` reports only gfx11/gfx12.

Verified on 8x MI300X (gfx942, ROCm 7.2 container, torch nightly rocm7.2):
the ROCm suite goes from 105 failures to 0 with no loss of passing tests.
2026-08-04 18:22:40 +08:00
Xiangwen Wang bff1b9a325 [Feature] Support stochastic FP32 to FP16/BF16 casts (#2735)
Support stochastic FP32 to FP16/BF16 casts
2026-07-23 11:45:20 +08:00
xiaoyouPREG ce9ff0c1a7 [BugFix] Gate stochastic FP4/FP8 casts on sm_100a (#2691)
* [BugFix] Gate stochastic FP4/FP8 casts on sm_100a

* [BugFix] Move stochastic cast arch checks into CUDA templates
2026-07-21 14:18:27 +08:00
ec3be54879 [Feature] Add stochastic rounding cast for f32 -> fp8/fp4 on CUDA (#2260)
* Add draft

* Update tvm

* Fix lint

* Update 3rdparty/tvm

* Update CUDA compute version requirement in tilelang tests to 10.0

* Polish stochastic-cast comments

* Add rbits invariance tests for stochastic-cast

* Fix lint

---------

Co-authored-by: LeiWang1999 <leiwang1999@outlook.com>
Co-authored-by: wangxiangwen <xiangwen.wang@deepseek.com>
2026-05-28 20:02:38 +08:00