trending/coursebook
1
0
Fork 0
mirror of https://github.com/cs341-illinois/coursebook.git synced 2026-10-02 08:04:38 +08:00
Code Issues Packages Projects Releases Wiki Activity

Final fix for this issue

Browse Source
This commit is contained in:
thenewpyjiang
2021-10-10 17:04:18 -05:00
parent 760357f0a7
commit b96ae86ff4
1 changed files with 1 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files
background/background.tex
+1 -1
View File
@@ -55,7 +55,7 @@ This isn't a class about caching, know how this could impact your code.
A short but non-complete list could be
\begin{enumerate}
\item \hyperref[sec_race_conditions]{Race Conditions}! If a value is stored in two different processor caches, then that value should be accessed by a single thread.
\item Race Conditions! If a value is stored in two different processor caches, then that value should be accessed by a single thread.
\item Speed. With a cache, your program may look faster mysteriously. Just assume that reads and writes that either happened recently or are next to each other in memory are fast.
\item Side effects. Every read or write effects the cache state. While most of the time this doesn't help or hurt, it is important to know. Check the Intel programmer guide on the lock prefix for more information.
\end{enumerate}