tilelang

mirror of https://github.com/tile-ai/tilelang.git synced 2026-10-21 06:40:23 +08:00

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Yongqi Zhuo b1e1e250a2 [Backend] [CUDA] Support GMMA/UMMA lowering for sliced SMEM layout (actually arbitrary layout) (#2452 )

* Add split-k for example_warp_specialize_flashmla

* Rotate QK issue to end of main loop to allow more latency hiding with TMA issue

* During rescale, read max score from REG instead of SMEM

* Move K_pe_shared_1 load

* Use stmatrix for SP0 write to reduce SMEM bank conflict

* Support arbitrary SMEM layout in MMA lowering

* Remove runtime guard for increase_descriptor_offset

2026-07-01 18:21:53 +08:00

test_tilelang_annotate_loop_layout.py

[Refactor][Pipeline] Run pipeline rewriting before layout inference and stabilize tiled WS (#2002 )

2026-04-07 23:54:55 +08:00

test_tilelang_bank_swizzle_expand.py

[TIR][IR] Update to use tirx (#2216 )

2026-05-20 15:38:13 +08:00

test_tilelang_cute.py

[Backend] [CUDA] Support GMMA/UMMA lowering for sliced SMEM layout (actually arbitrary layout) (#2452 )

2026-07-01 18:21:53 +08:00

test_tilelang_layout_equal.py

[TIR][IR] Update to use tirx (#2216 )