Yu Cheng 94c758ad47 [Refactor] Add SetMaxNRegCollector to Improve Register Hint Handling in Warp Specialized Rewriter (#194) ...

* [Refactor] Add SetMaxNRegCollector to Improve Register Hint Handling in Warp Specialized Rewriter

- Introduce `SetMaxNRegCollector` to collect register hints from SetMaxNReg calls
- Modify `WarpSpecializedRewriter` to use collected register hints for producer and consumer code
- Add validation checks for register hint values in the collector
- Remove SetMaxNReg calls during code transformation
- Enhance flexibility of register allocation in warp specialized rewriting

* temporary remove check in lower_hopper_intrin

2025-03-12 19:03:04 +08:00

..

test_tilelang_transform_annotate_device_regions.py

[CI] Comprehensive Test cases Implementation of Matmul Dequantize (#32)

2025-01-23 16:29:12 +08:00

test_tilelang_transform_cluster_planning.py

[CI][Test] Add test cases for tilelang transform ClusterPlanning (#57)

2025-01-26 17:30:57 +08:00

test_tilelang_transform_frontend_legalize.py

[CI][Test] Add test cases for tilelang transform InjectSoftwarePipeline and FrontendLegalize (#30)

2025-01-23 12:56:15 +08:00

test_tilelang_transform_inject_fence_proxy.py

[CI][Test] Add test cases for tilelang transform InjectFenceProxy (#66)

2025-02-09 01:25:57 +08:00

test_tilelang_transform_Inject_software_pipeline.py

[CI][Test] Add test cases for tilelang transform InjectSoftwarePipeline and FrontendLegalize (#30)

2025-01-23 12:56:15 +08:00

test_tilelang_transform_layout_inference.py

[CI][Test] Add test cases for tilelang transform LayoutInference and LowerTileOp on loop tail split functionality (#29)

2025-01-25 02:12:18 +08:00

test_tilelang_transform_legalize_safe_memory_access.py

[Dev] Implement test case for tilelang transformations (#53)

2025-01-25 23:53:15 +08:00

test_tilelang_transform_legalize_vectorized_loop.py

[Dev] Implement test case for tilelang transformations (#53)

2025-01-25 23:53:15 +08:00

test_tilelang_transform_lower_hopper_intrin.py

[Refactor] Add SetMaxNRegCollector to Improve Register Hint Handling in Warp Specialized Rewriter (#194)

2025-03-12 19:03:04 +08:00

test_tilelang_transform_lower_tile_op.py

[CI][Test] Add test cases for tilelang transform LayoutInference and LowerTileOp on loop tail split functionality (#29)

2025-01-25 02:12:18 +08:00

test_tilelang_transform_make_packed_api.py

[CI] Comprehensive Test cases Implementation of Matmul Dequantize (#32)

2025-01-23 16:29:12 +08:00

test_tilelang_transform_multi_version_buffer.py

[CI][Test] Add test cases for tilelang transform MultiVersionBuffer and WarpSpecialized (#72)

2025-02-11 16:04:28 +08:00

test_tilelang_transform_pipeline_planning.py

[CI][Test] Add test cases for tilelang transform PipelinePlanning (#44)

2025-01-25 01:30:32 +08:00

test_tilelang_transform_simplify.py

[CI] Comprehensive Test cases Implementation of Matmul Dequantize (#32)

2025-01-23 16:29:12 +08:00

test_tilelang_transform_thread_sync.py

[Refactor] Separate tilelang Pass Thread Sync (with Hopper support) from tvm (#85)

2025-02-14 18:29:25 +08:00

test_tilelang_transform_vectorize_loop.py

[Dev] Separate LoopVectorize Pass from upstream tvm (#62)

2025-02-04 01:44:15 +08:00

test_tilelang_transform_warp_specialized.py

[CI][Test] Add test cases for tilelang transform MultiVersionBuffer and WarpSpecialized (#72)

2025-02-11 16:04:28 +08:00