Zhang Jasonandroot 4639c279ea [AMD][CI issue] add gfx950 guard to fix the CI issues (#2105) ...

* add gfx950 guard to test_gfx950_cp_async_gs_16_in_codegen

* add gfx950 checking and update other cases for CI issues

* update

* [AMD][gfx950] Fix async-copy swizzle conflict, re-enable pipelining, fix 32x32 MFMA store layout

* update for format checking

* upgrade CI rocm sdk version to be rocm7.2

* update the changes according to the review info

* update the codes for format checking

* onlu run copy async on gfx950

* move T.alloc_shared and T.alloc_fragment outside the T.Pipelined loop

* update the test case

* revert the change to pyproject.toml

* update test_tilelang_hip_codegen

* find a possible issue about failed CI test

---------

Co-authored-by: root <root@dell300x-ccs-aus-f06-01.cs-aus.dcgpu>

2026-04-29 17:28:24 +08:00

..

test_cuda_restrict_codegen.py

[Language] Introduce T.annotate_restrict_buffers (#1428)

2025-12-17 12:44:19 +08:00

test_storage_rewrite_detect_inplace.py

[AMD][CI issue] add gfx950 guard to fix the CI issues (#2105)

2026-04-29 17:28:24 +08:00

test_tilelang_env.py

[Refactor] Refactor env into a more flexible version (#740)

2025-08-19 17:14:41 +08:00

test_tilelang_pass_config_disable_tma_lower.py

[Refactor][Pipeline] Run pipeline rewriting before layout inference and stabilize tiled WS (#2002)

2026-04-07 23:54:55 +08:00

test_tilelang_pass_config_disable_warp_specialized.py

[Refactor][Pipeline] Run pipeline rewriting before layout inference and stabilize tiled WS (#2002)

2026-04-07 23:54:55 +08:00