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HaleandTong WU eb2755750b [CUDA] Support tcgen5mma gemm ts (#1866 )

* feat: add mma_ts init

* feat: mma_ts valid

* fix: tcgen05.st & .ld mismatch on 16-bit pack/unpack, cause function mistake in gemm

* fix: diable unpack for bf16's tcgen05.st, enforce each tmem cell pack with 2 val, to be consistent with mma_ts's behaviour

* test: add test example in testing/python/kernel/test_tilelang_kernel_bf16_gemm_tcgen5_ts.py

* docs: add docstrings to gemm_base,gemm_tcgen05 and test files

* style: apply clang-format and ruff format

* refactor: merge ld/st meta, remove example, rename getTcgen05Meta to getTcgen05MetaLd_*

* Restore TODO for tcgen05.cp support in copy.cc

Added a TODO comment for future support of tcgen05.cp in conjunction with LowerTmemCopy.

* fix: swap Ramp/PrimExpr isinstance order in access_ptr_from

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Co-authored-by: Tong WU <109033598+Rachmanino@users.noreply.github.com>

2026-02-28 16:33:13 +08:00

test_tilelang_kernel_bf16_gemm_mma.py

[Enhancement] Update examples and tests for improved type handling functionality (#1448 )

2025-12-17 14:41:25 +08:00

test_tilelang_kernel_bf16_gemm_tcgen5_ts.py

[CUDA] Support tcgen5mma gemm ts (#1866 )

2026-02-28 16:33:13 +08:00

test_tilelang_kernel_element_wise_add.py

[Enhancement] Update examples and tests for improved type handling functionality (#1448 )

2025-12-17 14:41:25 +08:00

test_tilelang_kernel_fp8_gemm_mma.py

[Enhancement] Update examples and tests for improved type handling functionality (#1448 )