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* [Enhancement] Enhance dequantization examples and utilities - Added a new example for grouped matrix multiplication with experts in `example_dequant_groupgemm_bf16_mxfp4_hopper.py`. - Improved dequantization logic in existing examples by replacing nested loops with vectorized operations for better performance. - Updated `torch_convert_bit_twiddling` function in `utils.py` to utilize parallel processing, enhancing efficiency and clarity in the conversion process. Co-authored-by: Zhengju Tang <97930865+tzj-fxz@users.noreply.github.com> * fix typos in docstrings * remove redundant code * [Format] Unreproducible debug with T.print * [BugFix] Correct dtype in ref dequantize; larger data distribution * [Format] * [Refactor] Clean up and optimize example_dequant_groupgemm_bf16_mxfp4_hopper.py and utils.py - Removed unnecessary cache disabling and manual seed setting in the example. - Simplified nested loops into parallelized operations for better readability and performance. - Updated the assertion function in utils.py to print detailed error messages. - Adjusted tensor sizes in examples * [Refactor] Update import path in example_dequant_gemm_fine_grained.py - Changed the import statement for `_tir_packed_to_unsigned_convert` from `bitblas.quantization` to `tilelang.quantize` to reflect the new module structure. * lint * rename and add test * lint * [Feature] Enhance autotuning and configuration generation in example_dequant_groupedgemm_bf16_mxfp4_hopper.py - Added a new function `get_configs()` to generate hyperparameter configurations for tuning. - Updated the `matmul` function to utilize autotuning with the new configurations. - Improve kernel performance via vectorization and threadblock swizzle. - Enhanced the main function to support the new autotuning inputs and updated parameters for better performance. * lint * fix typo * fix typo and lint * make ci format check happy * fix ci --------- Co-authored-by: Zhengju Tang <97930865+tzj-fxz@users.noreply.github.com> Co-authored-by: tzj-fxz <tzjfxz@gmail.com>
442 lines
15 KiB
Python
442 lines
15 KiB
Python
import torch
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import torch.backends
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import tilelang.testing
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from tilelang import tvm as tvm
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from tvm import DataType
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import tilelang.language as T
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tilelang.testing.set_random_seed(0)
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@tilelang.jit(out_idx=[2])
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def matmul(
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M,
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N,
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K,
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block_M,
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block_N,
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block_K,
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in_dtype,
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out_dtype,
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accum_dtype,
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num_stages,
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threads,
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num_bits=4,
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):
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from tilelang.quantize import _tir_packed_to_unsigned_convert
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num_elems_per_byte = 8 // num_bits
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storage_dtype = "int8"
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storage_nbit = int("".join(c for c in storage_dtype if c.isdigit()))
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storage_type = str("".join(c for c in storage_dtype if not c.isdigit()))
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A_shape = (M, K)
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B_shape = (N, K // num_elems_per_byte)
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A_shared_shape = (block_M, block_K)
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B_shared_shape = (block_N, block_K // num_elems_per_byte)
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B_dequantize_shared_shape = (block_N, block_K)
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MAX_TRANSACTION_SIZE_IN_BITS = 128
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local_size = MAX_TRANSACTION_SIZE_IN_BITS // DataType(in_dtype).bits
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local_size_compressed = local_size // num_elems_per_byte
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@T.prim_func
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def main(
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A: T.Tensor(A_shape, in_dtype),
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B: T.Tensor(B_shape, storage_dtype),
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C: T.Tensor((M, N), out_dtype),
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):
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with T.Kernel(T.ceildiv(N, block_N), T.ceildiv(M, block_M), threads=threads) as (bx, by):
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A_shared = T.alloc_shared(A_shared_shape, in_dtype)
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B_shared = T.alloc_shared(B_shared_shape, storage_dtype)
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B_local = T.alloc_local([local_size_compressed], storage_dtype)
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B_dequantize_local = T.alloc_local([local_size], in_dtype)
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B_dequantize_shared = T.alloc_shared(B_dequantize_shared_shape, in_dtype)
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C_local = T.alloc_fragment((block_M, block_N), accum_dtype)
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tx = T.get_thread_binding()
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T.clear(C_local)
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for k in T.Pipelined(T.ceildiv(K, block_K), num_stages=num_stages):
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T.copy(A[by * block_M, k * block_K], A_shared)
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T.copy(B[bx * block_N, k * block_K // num_elems_per_byte], B_shared)
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for i in T.serial(block_N * block_K // num_elems_per_byte //
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(threads * local_size_compressed)):
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for v in T.vectorized(0, local_size_compressed):
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index = i * threads * local_size_compressed + tx * local_size_compressed + v
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vi = index // (block_K // num_elems_per_byte)
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vj = index % (block_K // num_elems_per_byte)
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B_local[v] = B_shared[vi, vj]
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for v in T.serial(0, local_size):
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B_dequantize_local[v] = _tir_packed_to_unsigned_convert(
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storage_type, storage_nbit)(
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num_bits,
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B_local[v // num_elems_per_byte],
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v % num_elems_per_byte,
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dtype=in_dtype,
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)
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for v in T.vectorized(0, local_size):
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index = i * threads * local_size + tx * local_size + v
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vi = index // block_K
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vj = index % block_K
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B_dequantize_shared[vi, vj] = B_dequantize_local[v]
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T.gemm(A_shared, B_dequantize_shared, C_local, transpose_B=True)
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T.copy(C_local, C[by * block_M, bx * block_N])
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return main
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def run_gemm(
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M,
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N,
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K,
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in_dtype,
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out_dtype,
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dtypeAccum,
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block_M,
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block_N,
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block_K,
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num_stages=3,
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num_threads=128,
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):
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kernel = matmul(
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M,
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N,
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K,
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block_M,
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block_N,
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block_K,
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in_dtype,
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out_dtype,
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dtypeAccum,
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num_stages,
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num_threads,
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)
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profiler = kernel.get_profiler(tilelang.TensorSupplyType.Integer)
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out = profiler.run_once()
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assert out is not None
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def ref_program(A, qB):
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import torch
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B = (
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torch.zeros(qB.shape[0], qB.shape[1] * 8 // 4,
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dtype=torch.half).to(torch.half).to(A.device))
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for i in range(B.shape[0]):
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for j in range(B.shape[1]):
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B[i][j] = ((qB[i][j // 2] >> (4 * (j % 2))) & 0xF).to(torch.half)
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C = torch.matmul(A.to(torch.float), B.T.to(torch.float))
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C = C.to(torch.__getattribute__(out_dtype))
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return C
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profiler.assert_allclose(ref_program)
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@tvm.testing.requires_package("bitblas")
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def tl_matmul_with_ladder_weight_only_transform_block_reduce_int4(
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M,
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N,
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K,
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in_dtype,
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out_dtype,
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accum_dtype,
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transform_b,
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):
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from tilelang.intrinsics.mma_layout import make_mma_swizzle_layout as make_swizzle_layout
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from tilelang.intrinsics.mma_macro_generator import (
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TensorCoreIntrinEmitterWithLadderTransform,)
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from bitblas.gpu.intrin.lop3 import decode_i4_to_f16
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assert in_dtype in [
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"float16",
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"int8",
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], "Currently only float16 and int8 are supported"
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assert out_dtype in [
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"float16",
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"float32",
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"int32",
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], "Currently only float16, float32 and int32 are supported"
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num_bits = 4
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num_elems_per_byte = 8 // num_bits
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storage_dtype = "int8"
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micro_size_x = micro_size_y = micro_size_k = 16
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if out_dtype == "int32":
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micro_size_k = 32
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# This is a debug config
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block_row_warps = 2
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block_col_warps = 2
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warp_rows = 4
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warp_cols = 4
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warp_row_tiles = micro_size_x * warp_rows
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warp_col_tiles = micro_size_y * warp_cols
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shared_scope = "shared.dyn"
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# Pipeline Stage
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stage = 2
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reduce_k = 1
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block_M = block_row_warps * warp_row_tiles
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block_N = block_col_warps * warp_col_tiles
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block_K = 32 if in_dtype == "float16" else 64
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chunk = block_K // reduce_k
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is_smooth_a = False
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can_swizzle = block_K * DataType(in_dtype).bits == 512
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apply_pad_a = not (is_smooth_a or can_swizzle)
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pad_factor = 8
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A_shape = (M, K)
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B_shape = (N // micro_size_y, K // micro_size_k, micro_size_y,
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micro_size_k // num_elems_per_byte)
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A_shared_shape = (block_M, (block_K + pad_factor) if apply_pad_a else block_K)
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B_shared_shape = (
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block_N // micro_size_y,
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block_K // micro_size_k,
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micro_size_y,
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micro_size_k // num_elems_per_byte,
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)
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C_shared_shape = (
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block_M // micro_size_x,
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block_N // micro_size_y,
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micro_size_x,
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micro_size_y,
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)
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warp_size = 32
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threads = warp_size * (block_row_warps * block_col_warps)
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local_size = (micro_size_x * micro_size_y) // warp_size
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warp_rows = warp_row_tiles // micro_size_x
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warp_cols = warp_col_tiles // micro_size_y
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# MMA Wrapper to Auto Generate Code for MMA
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mma_emitter = TensorCoreIntrinEmitterWithLadderTransform(
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a_dtype=in_dtype,
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b_dtype=in_dtype,
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accum_dtype=accum_dtype,
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a_transposed=False,
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b_transposed=True,
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block_row_warps=block_row_warps,
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block_col_warps=block_col_warps,
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warp_row_tiles=warp_row_tiles,
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warp_col_tiles=warp_col_tiles,
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chunk=chunk,
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reduce_k=reduce_k,
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transform_kind_b=transform_b,
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num_elems_per_byte=num_elems_per_byte)
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vec_load_qb = 16
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if block_N * (block_K // reduce_k) // num_elems_per_byte // threads < vec_load_qb:
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vec_load_qb = block_N * (block_K // reduce_k) // num_elems_per_byte // threads
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@T.prim_func
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def main(
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A: T.Tensor(A_shape, in_dtype),
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B: T.Tensor(B_shape, storage_dtype),
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C: T.Tensor((M, N), out_dtype),
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):
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with T.Kernel(
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T.ceildiv(N, block_N), T.ceildiv(M, block_M), threads=threads,
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prelude=decode_i4_to_f16) as (bx, by):
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A_shared = T.alloc_shared(A_shared_shape, in_dtype, scope=shared_scope)
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B_shared = T.alloc_shared(B_shared_shape, storage_dtype, scope=shared_scope)
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C_shared = T.alloc_shared(C_shared_shape, out_dtype, scope=shared_scope)
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A_local = T.alloc_local((warp_rows * local_size), in_dtype)
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B_local = T.alloc_local((warp_cols * local_size // num_elems_per_byte), storage_dtype)
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B_dequantize_local = T.alloc_local((warp_cols * local_size), in_dtype)
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C_local = T.alloc_local((warp_rows * warp_cols * local_size), accum_dtype)
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reduced_accum_res = T.alloc_local(0, accum_dtype)
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thread_binding = T.get_thread_binding(0)
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rk = T.get_thread_binding(1)
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T.annotate_layout({
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A_shared: make_swizzle_layout(A_shared),
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})
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T.use_swizzle(panel_size=10)
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T.clear(C_local)
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for ko in T.Pipelined((K // block_K), num_stages=stage):
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# Load A into shared memory
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for i, k in T.Parallel(block_M, (block_K // reduce_k)):
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vk = rk * (block_K // reduce_k) + k
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A_shared[i, vk] = A[by * block_M + i, ko * block_K + vk]
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# TODO(lei): Layout Inference Pass is not efficient to handle the four dims int8 load
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for i in T.serial(block_N * (block_K // reduce_k) // num_elems_per_byte //
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(threads * vec_load_qb)):
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for v in T.vectorized(0, vec_load_qb):
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t = thread_binding
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idx = i * threads * vec_load_qb * reduce_k + rk * threads * vec_load_qb + t * vec_load_qb + v
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vkk = idx % (micro_size_k // num_elems_per_byte)
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vjj = (idx // (micro_size_k // num_elems_per_byte)) % micro_size_y
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vk = (idx // (micro_size_k // num_elems_per_byte) // micro_size_y) % (
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block_K // micro_size_k)
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vj = (idx // (micro_size_k // num_elems_per_byte) // micro_size_y //
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(block_K // micro_size_k)) % (
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block_N // micro_size_y)
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B_shared[vj, vk, vjj,
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vkk] = B[bx * (block_N // micro_size_y) + vj,
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ko * (block_K // micro_size_k) + vk, vjj, vkk]
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for ki in T.serial(0, (block_K // (micro_size_k * reduce_k))):
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# Load A into fragment
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mma_emitter.ldmatrix_a(
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A_local,
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A_shared,
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ki,
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rk=rk,
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)
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# Load B into fragment
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mma_emitter.ldmatrix_b(
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B_local,
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B_shared,
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ki,
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rk=rk,
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)
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for j in T.serial(warp_cols):
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local_size_b = mma_emitter.local_size_b
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T.call_extern('handle', 'decode_i4u_to_f16',
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T.address_of(B_local[j * local_size_b // num_elems_per_byte]),
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T.address_of(B_dequantize_local[j * local_size_b]), 8)
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mma_emitter.mma(A_local, B_dequantize_local, C_local)
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if reduce_k > 1:
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for n in T.serial(warp_rows * warp_cols * local_size):
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T.attr(
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T.comm_reducer(lambda x, y: x + y, [T.float16(0)]),
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"reduce_scope",
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T.reinterpret(T.uint64(0), dtype="handle"),
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)
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T.evaluate(
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T.tvm_thread_allreduce(
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T.uint32(1),
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C_local[n],
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True,
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reduced_accum_res[0],
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rk,
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dtype="handle",
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))
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if rk == 0:
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C_local[n] = reduced_accum_res[0]
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if rk == 0:
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mma_emitter.stmatrix(
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C_local,
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C_shared,
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)
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for i, j in T.Parallel(block_M, (block_N // reduce_k)):
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vj = rk * (block_N // reduce_k) + j
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C[by * block_M + i,
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bx * block_N + vj] = C_shared[i // micro_size_x, vj // micro_size_y,
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i % micro_size_x, vj % micro_size_y]
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return main
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def assert_tl_matmul_with_ladder_weight_only_transform_block_reduce_int4_correctness(
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M,
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N,
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K,
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in_dtype,
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out_dtype,
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accum_dtype,
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transform_b,
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):
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import bitblas
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matmul = tl_matmul_with_ladder_weight_only_transform_block_reduce_int4(
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M, N, K, in_dtype, out_dtype, accum_dtype, transform_b)
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kernel = tilelang.compile(matmul, out_idx=[2])
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src_code = kernel.get_kernel_source()
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profiler = kernel.get_profiler(tilelang.TensorSupplyType.Integer)
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# src_code is the generated cuda source
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assert src_code is not None
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num_bits = 4
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num_elems_per_byte = 8 // num_bits
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storage_dtype = "int8"
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A = torch.rand(M, K, device="cuda", dtype=getattr(torch, in_dtype))
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qB = torch.randint(
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0, 127, (N, K // num_elems_per_byte), device="cuda", dtype=getattr(torch, storage_dtype))
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C = torch.zeros(M, N, device="cuda", dtype=getattr(torch, accum_dtype))
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ladder_permutate_config = bitblas.ops.LadderPermutateConfig(
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M=N,
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N=K,
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transform_kind=transform_b,
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transpose_matrix=True,
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dequantize_bits=num_bits,
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storage_dtype=storage_dtype,
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)
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ladder_permutate = bitblas.ops.LadderPermutate(ladder_permutate_config)
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lop3_permutate_config = bitblas.ops.LOP3PermutateConfig(
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M=N,
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N=K,
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datatype=in_dtype,
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dequantize_bits=num_bits,
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storage_dtype=storage_dtype,
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)
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lop3_permutate = bitblas.ops.LOP3Permutate(
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config=lop3_permutate_config,
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target=tvm.target.Target("llvm"),
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)
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QLB = ladder_permutate(qB.cpu()).cuda()
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QLB = lop3_permutate(QLB.cpu()).cuda()
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kernel(A, QLB, C)
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latency = profiler.do_bench(warmup=25)
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# Ensure that the latency is not None
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assert latency is not None
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B = (
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torch.zeros(qB.shape[0], qB.shape[1] * 8 // 4,
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dtype=torch.half).to(torch.half).to(A.device))
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for i in range(B.shape[0]):
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for j in range(B.shape[1]):
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B[i][j] = ((qB[i][j // 2] >> (4 * (j % 2))) & 0xF).to(torch.half)
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# Get Reference Result
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ref_c = torch.matmul(A, B.T).to(getattr(torch, accum_dtype))
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print("Ref C: ", ref_c)
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print("C: ", C)
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torch.testing.assert_close(C, ref_c, rtol=1e-2, atol=1e-2)
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@tilelang.testing.requires_package("bitblas")
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def test_run_dequantize_gemm():
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run_gemm(256, 256, 256, "float16", "float16", "float16", 128, 128, 32, num_threads=128)
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run_gemm(256, 256, 256, "int8", "int32", "int32", 128, 128, 32, num_threads=128)
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@tilelang.testing.requires_package("bitblas")
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def test_assert_tl_matmul_with_ladder_weight_only_transform_block_reduce_int4():
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assert_tl_matmul_with_ladder_weight_only_transform_block_reduce_int4_correctness(
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256, 1024, 512, "float16", "float16", "float16", 3)
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def main():
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test_run_dequantize_gemm()
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if __name__ == "__main__":
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main()
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