Gengyuan Bai 1d155f4b80 [Cleanup] Replace root reproducers with CPU regression coverage (#2878) ...

* [Cleanup] Replace root vec_type reproducer with CPU regression test (#2875)

Remove the root-level reproducer scripts and add a proper pytest under
testing/python/cpu covering vectorized vec_type arithmetic (+ - * /) on
the CPU C target: the generated source must reach a float4 expression,
compile as C++, and execute with numerically correct results.

* [Test] Pin CPU vec_type test tensors to float32/cpu

CodeRabbit review finding: torch.randn/rand/empty respected PyTorch's
process-wide default dtype/device, so another test changing
set_default_dtype/set_default_device could create float64 or non-CPU
tensors and break the float32 CPU kernel contract. Pin all six tensors
explicitly without changing process-wide defaults.

2026-08-05 14:57:38 +08:00

..

amd

[BugFix] Fix ROCm intrinsic resolution after language dialect refactor (#2779)

2026-07-27 17:58:18 +08:00

analysis

[Refactor][Pipeline] Run pipeline rewriting before layout inference and stabilize tiled WS (#2002)

2026-04-07 23:54:55 +08:00

arith

[TIR][IR] Update to use tirx (#2216)

2026-05-20 15:38:13 +08:00

autotune

[BugFix] Prevent autotuner cache reuse across different outputs and validation settings (#2793)

2026-07-29 14:08:14 +08:00

cache

[CUDA][Cache] Include compile options in binary cache key (#2532)

2026-07-07 00:09:22 +08:00

carver

[BugFix] Fix IntrinInfo repr (#2175)

2026-05-22 16:16:50 +08:00

components

[Testing] Gate CUDA-only tests so non-CUDA backends can run the suite (#2863)

2026-08-04 18:22:40 +08:00

contrib

[BugFix] Isolate cross-compiler options per invocation (#2728)

2026-07-22 19:00:59 +08:00

cpu

[Cleanup] Replace root reproducers with CPU regression coverage (#2878)

2026-08-05 14:57:38 +08:00

cuda

[CUDA] Extend the GEMM FMA fallback to SM75 (#2811)

2026-07-30 13:05:55 +08:00

debug

[Debug][TIR] Drive Pass Visualizer with PassInstrument (#2866)

2026-08-04 18:11:36 +08:00

fastmath

[TIR][IR] Update to use tirx (#2216)

2026-05-20 15:38:13 +08:00

issue

[BugFix] Handle vectorized SelectNode in codegen_cuda (#2843)

2026-08-05 13:51:31 +08:00

jit

[Testing] Gate CUDA-only tests so non-CUDA backends can run the suite (#2863)

2026-08-04 18:22:40 +08:00

kernel

[Testing] Gate CUDA-only tests so non-CUDA backends can run the suite (#2863)

2026-08-04 18:22:40 +08:00

language

[TIR][Python] Split backend-specific op proxies (#2870)

2026-08-05 12:57:23 +08:00

layout

[Refactor] Recycle T.unroll(explicit=True) for early explicit unrolling (#2859)

2026-08-04 13:52:54 +08:00

llvm

[BugFix] Fix llvm auto backend resolution (#2519)

2026-07-06 10:55:13 +08:00

math

[BugFix] Add pre-SM80 fallback for bf16 __hfma (#2769)

2026-07-25 19:57:47 +08:00

metal

[BugFix][Metal] Resolve auto backend to torch and skip disk cache for torch (#2856)

2026-08-04 12:33:41 +08:00

profiler

[tilelang] Fix CUPTI cache flush filtering (#2244)

2026-05-22 16:15:53 +08:00

quantize

[CUDA] Add SM120 NVF4 block-scale MMA support (#2364)

2026-07-30 18:10:10 +08:00

runtime

[TIR][IR] Update to use tirx (#2216)

2026-05-20 15:38:13 +08:00

target

[Testing] Gate CUDA-only tests so non-CUDA backends can run the suite (#2863)

2026-08-04 18:22:40 +08:00

tilelibrary

[Refactor] Move example-only helpers out of tilelang package (#2761)

2026-07-24 18:03:34 +08:00

tools

[Testing] Gate CUDA-only tests so non-CUDA backends can run the suite (#2863)

2026-08-04 18:22:40 +08:00

transform

[Testing] Gate CUDA-only tests so non-CUDA backends can run the suite (#2863)

2026-08-04 18:22:40 +08:00

utils

[Refactor] Move example-only helpers out of tilelang package (#2761)

2026-07-24 18:03:34 +08:00

webgpu

[Enhancement] Update examples and tests for improved type handling functionality (#1448)

2025-12-17 14:41:25 +08:00

test_version_provider.py

[Build] Fix sdist version metadata (#2374)

2026-06-11 20:40:16 +08:00