 Yueming Yuan
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6d0cd93f10
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DeepSeek-V4 support-v2: native megatron implementation as option (#2706)
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2026-08-31 13:21:05 -07:00 |
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Yueming YuanandJiajun Li
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2c78e2abd5
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feat: resolve --hardware from the node in every launcher (#2738)
Co-authored-by: Jiajun Li <guapisolo@gmail.com>
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2026-08-25 13:14:03 -07:00 |
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Zhiyao Jiang
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02098f1e59
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[AMD] Point the ROCm image at the v0.5.16 wheels release with TE 2.17.0 (#2660)
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2026-08-19 19:52:21 -07:00 |
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943b8acd52
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[AMD] Enable amd pr ci (#2347)
Co-authored-by: Xinyu Jiang <xinyuj2@andrew.cmu.edu>
Co-authored-by: Yuankai Chen <206619631+yuankaichen-amd@users.noreply.github.com>
Co-authored-by: Xinyu Kang <93342727+Xinyu-Kang@users.noreply.github.com>
Co-authored-by: Shekhar <38083203+indianspeedster@users.noreply.github.com>
Co-authored-by: Sree Rohith Pulipaka <119916571+sreerohi@users.noreply.github.com>
Co-authored-by: lizamd <161388580+lizamd@users.noreply.github.com>
Co-authored-by: Jiajun Li <guapisolo@gmail.com>
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2026-08-13 20:14:11 -07:00 |
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Yueming YuanandZhichen Zeng
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2b2ef6f8b9
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Replace all the .sh launch scripts with .py launch script (#2356)
Co-authored-by: Zhichen Zeng <zhichen.zeng@radixark.ai>
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2026-08-11 21:51:40 -07:00 |
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Yueming Yuan
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6a6843f1db
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[fix] fix the bugs/outdated commands in .sh scripts and the corresponding snapshots (#2355)
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2026-08-11 19:12:18 -07:00 |
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fzyzcjy
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fe30593dd6
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Replace the model config shell scripts with python (#1910)
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2026-08-09 18:51:21 +08:00 |
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fzyzcjy
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063af76f32
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Remove non-reproducible file arguments by supporting inline base64 payloads (#1905)
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2026-08-09 18:46:33 +08:00 |
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fzyzcjy
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49f9aef18a
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Rename exec_command by the resource its command needs (#1903)
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2026-08-09 18:43:51 +08:00 |
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fzyzcjy
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5ed3fd170b
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Fix typo environment variable and unbuffer python outputs (#1895)
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2026-08-09 18:19:56 +08:00 |
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Zhiyao Jiang
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3507ce1543
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[AMD] retune AMD 4-node dsv4 config (#2139)
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2026-08-04 11:04:58 -07:00 |
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Xinyu JiangandZhiyao Jiang
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d9e3c3b394
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[AMD] DeepSeek-V4: use the ROCm precision-parity norm path (#2040)
Co-authored-by: Zhiyao Jiang <jessicajiang324@gmail.com>
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2026-07-31 15:09:50 -07:00 |
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6bbc317fc1
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[AMD] Drop inert DSv4 rollout knobs and add an MTP recipe (#1733)
Co-authored-by: Zhiyao Jiang <jessicajiang324@gmail.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-07-29 13:14:58 -07:00 |
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Shi-DongandZhichen Zeng
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0916d04f2f
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refactor(examples): group examples into infra_features/ and experimental/ (#1953)
Co-authored-by: Zhichen Zeng <zhichen.zeng@radixark.ai>
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2026-07-29 12:10:19 -07:00 |
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Zhiyao JiangandXinyu Jiang
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a60c23ce89
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[AMD] Add AMD MI350X/MI355X (gfx950) blockwise FP8 support for run_qwen3_30b_a3b (#1465)
Co-authored-by: Xinyu Jiang <xinyuj2@andrew.cmu.edu>
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2026-07-15 16:52:14 -07:00 |
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Xinyu Kang
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d4f5a80189
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[AMD][DeepSeek V4][2/N] Enable decode CUDA graphs on MI355X (#1664)
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2026-07-13 22:58:31 -07:00 |
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Xinyu JiangandZhiyao Jiang
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352b4aafcb
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[AMD] Enable DeepSeek-V4-Flash FP8 RL training on MI355X (#1607)
Co-authored-by: Zhiyao Jiang <jessicajiang324@gmail.com>
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2026-07-09 19:49:03 -07:00 |
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Yuzhen Zhou
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82bf1962b2
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[AMD] Upgrade to sglv0.5.10 (#973)
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2026-04-12 21:31:41 -07:00 |
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